1. Field
The embodiments discussed herein relate to designing layout data for a circuit.
2. Description of Related Art
In a layout of semiconductor integrated circuits, transistors may be laid out so that they have substantially the same pitch and faces substantially the same direction in order to improve yield or reduce irregularities.
Related art is disclosed in Japanese Laid-open Patent Publication No. H04-163963, Japanese Laid-open Patent Publication No. 558-166742, and Japanese Patent No. 3275313, for example.